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 XE1209
Ultra Low Power CMOS Transceiver
XE1209
30 - 70 kH Ultra Low Power CMOS Transceiver
GENERAL DESCRIPTION
The XE1209 is a CMOS Ultra Low-Power transceiver for short-range low frequency RF data communications system. It uses 2-level Continuous Phase FSK modulation. The receiver section includes the preamplifier, the down-converter, and the channel filters, the demodulator and the bit synchronizer, which delivers synchronized data at the output. The transmitter section is composed of a Direct Digital Synthesizer (DDS), and the power amplifier generating a square-wave output current. The XE1209 has carrier detector to detect the presence of a signal at the carrier frequency. The local clock is based on a 32kHz crystal oscillator and a PLL to generate the required Local oscillator (LO) frequency. The XE1209 has a simple interface with an external microcontroller.
KEY FEATURES
* * * * * * Single chip transceiver Low cost Low external component count Ultra Low Power Stand-by mode Carrier detection mode Low-power receiver mode Unlicensed frequency band Short range applications; 1 to 3 meters
APPLICATIONS
* Remote control * Short Range Wireless data * Access control
ORDERING INFORMATION
Part number XE1209C012TRLF Temperature range -10C to +60 Package SO-20 RoHS compliant
Rev 1 August 2005
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XE1209
Ultra Low Power CMOS Transceiver 1 PIN DESCRIPTION
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Name TEST VSS QIN VDDA QOUT VSSA IREF VREF SUPTEST RE INA INB VSSPA PAOUT VDD DCLK DATA DE SD SC Description Test pin Ground for digital Xtal pin or input for external clock Supply voltage for analog Xtal pin Ground for analog Iref node for external resistance Vref node for external capacitance Test pin Receiver enable RF input signal RF input signal Ground for RF power amplifier RF power amplifier output Supply voltage for digital Received data clock output Input/output bit stream or output of the carrier detector Data enable for 3-wire communication Data input for 3-wire communication Clock input for 3-wire communication
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TYPICAL APPLICATION
The product is to be used in a system for low frequency RF data communications. The transmission is made with 2level CPFSK modulation. The modulated signal has a carrier frequency fc and a deviation frequency f; the coding of the data is the following: fRFin = fc + f "1" fRFin = fc - f "0".
above shows the structure of the transceiver and the external components required by the application. A 3-wire bus allows the product to receive configuration data from a microcontroller. Note: pin TEST remains unconnected. 2.1 TYPICAL EXTERNAL COMPONENTS Besides the components needed for the RF communication itself, the following external components are required: Name Cvdd Cvref Riref Xtal Type Capacitor Capacitor Resistance Crystal Pins to be connected VDD - VSS VREF - VSS IREF - VSS QIN - QOUT Value 100 nF 47 nF 280 k 32.768 kHz Tolerance 10 % 10 % 1% 20 ppm Max. Temp. variation 5 % over -10 C to 60 C 5 % over -10 C to 60 C 100 ppm/K - 50 ppm over -10 to 60 C
The reference of the crystal used for Xtal is the following: "DS26 watch crystal" from Micro Crystal Switzerland
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GENERAL FUNCTIONAL DESCRIPTION
The XE1209 is composed of 6 main functional blocks: Receiver The receiver channel converts a 2-level CPFSK modulated signal into a bit stream. It is composed of the following blocks: preamplifier, down-converters (0-IF architecture), channel filters, limiters, demodulator, and bit synchronizer.
(c) Semtech 2005 www.semtech.com
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XE1209
Ultra Low Power CMOS Transceiver
Transmitter The transmitter performs the modulation of an input bit-stream. The main parts of this block are a DDS (Direct Digital Synthesizer), generating a digital signal with a modulated period, and a power amplifier generating a squarewave output current controlled by the output of the DDS. Carrier detector The function of this block is to detect the presence of a signal at the carrier frequency fc.
Clock generator The clock generator is composed of a quartz oscillator generating the reference signal at 32.768 kHz, and a PLL (Phase Locked Loop), whose function is to deliver a signal at a frequency which is a multiple of the oscillator output; the multiplying factor is programmable on two values. Service block This block provides the whole circuit with the required voltage references and current sources. Digital part The digital part has two main functions: * implement the 3-wire interface for the communication with the external microcontroller. * generate all the internal signals according to the selected mode of operation and the content of the configuration register The product has four operating modes: * a standby mode (M1), where all the blocks are powered off (in this mode, the oscillator can be either on or off according to the value of a bit (called OSC) stored in the configuration register), * a carrier detector mode (M2), where only the carrier detector is active, * a transmitter mode (M3), where the transmitter is powered on, * A receiver mode (M4), where the receiver is powered on.
(c) Semtech 2005
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XE1209
Ultra Low Power CMOS Transceiver
The RE input and the bit TR in the configuration register determine the mode setting. The Table 1 gives the status of the main blocks in each mode. M1 standby off off off Osc PLL ON/off off off ON M2 carrier detection off off ON ON / off off ON ON M3 Tx off ON off ON / off ON ON ON M4 Rx ON off off ON / off ON ON ON
Receiver Transmitter Carrier detector Clock generator Service block Digital part
Table 1 Mode selection
When the oscillator is off (bit OSC=0), an external clock is applied on the pin QIN.
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ABSOLUTE MAXIMUM CONDITIONS
Symb STO_TR
RATINGS,
OPERATING
RANGES
AND
EXTERNAL
Parameters Conditions Min Typ Max Unit Storage temperature -40 +85 C range TR Operating temperature -10 +25 +60 C range VDD Operating supply 2.0 2.6 3.2 V voltage PLL reference External oscillator, FREF_EXT 32.735 32.768 32.800 kHz frequency VDD=2.6 V, temp=25 C CL_CK External capacitate Full range of supply and 5 pF load on the pin CLK temperature IL_CK External leakage Full range of supply and 50 nA current on the pin CLK temperature RP_OSC Parasitic resistance Full range of supply and 20 M between the pins QIN, temperature QOUT and any other ASIC pin CP_OSC Parasitic capacitance Full range of supply and 0.5 pF between the pins QIN, temperature QOUT and any other ASIC pin Stresses above those listed in this clause may cause permanent device failure. Exposure to absolute maximum ratings for extended periods may affect device reliability. Electrostatic discharges: * The device withstands 2000 Volts Standardized Human Body Model ESD pulses when tested according to MIL883C method 3015.5 (pin combination 2). Latch-up: * Static latch-up protection level is 30mA at 25 C
(c) Semtech 2005
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XE1209
Ultra Low Power CMOS Transceiver
5
ELECTRICAL SPECIFICATIONS
Electrical specifications are defined for VDD=2.6 V, Temp=25 C, fc=36.86 kHz, and a data rate of 1820 bit/s, unless otherwise specified. Symb IDDS1 IDDS2 Parameters Standby current Standby current Conditions Oscillator stopped Oscillator active, VDD=3V, Temp= -10 to +60C, unloaded Temp = -10 to +60 C Temp = -10 to +60 C Load = resistance of 15 ohms connected between VDD and pin PAOUT, programmable through the 3-wire bus Min Typ 0.15 1 Max 1 2 Unit A A
IDD1 IDD2 ISINK
Supply current in carrier detection mode (M2) Supply current in receiver mode (M4) Sink current transmitter mode (peak value)
82 45 23 5.65 2.60 1.35
95 200 110 60 30 7.5 3.5 1.80 32.768 589.82 720.90 1000 25 70 36.86 45.05 23 3 5000 1820 1872 200 500
120 300 138 75 37 9.35 4.40 2.25 591.00 722.35 15 260 600
A A mA mA mA mA mA mA kHz kHz kHz k pF Vp mV kHz kHz dBc dBc dB Hz bit/s Hz Vp Vp
FREF FR RIN CIN RFS MAXIN FC ATT ATT3 CMRR DC BW DR FDEV PDL
PLL reference frequency PLL frequency RF differential input DC resistance RF differential input capacitance RF sensitivity Maximum RF effective input signal Transmission carrier frequency Adjacent channel rejection at f = 30.6 kHz Adjacent channel rejection at f = 110.58 kHz DC Common mode rejection ratio Receiver -3dB Bandwidth Data rate Frequency deviation Carrier detector level FC=36.86 kHz 3 rising edges measured at output in a 900us time window At RFSmin Rsource=100,BER=10 At RFSmin Rsource=100,BER=10 At RFSmin Rsource=100,BER=10 FC=36.86 kHz, DSB
-4 -4 -4
Programmable via 3-wire bus 588.65 719.45 500 Rsource=100 BER=10-4 Without signal any parasitic 11 -1 30 140 400 200
(c) Semtech 2005
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XE1209
Ultra Low Power CMOS Transceiver
Symb RAC Parameters Receiver Activation time Conditions from carrier-detector mode and with oscillator running at temp =-10 to +60C VSS 0.8*VDD Min Typ 1.6 Max 2.5 Unit ms
XOAC LL HL
Xtal oscillator activation time Logical low level Logical high level
0.2 -
2 0.2*VDD VDD
s V V
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INPUT/OUTPUT RF SIGNALS
6.1 TRANSMIT MODE The transmitter is composed of a DDS and a power amplifier. The DDS is a 12-bits counter, which is incremented by 256+13 when the input data is 1 and by 256-13 when the input data is 0. This way, the frequency deviation is equal to:
f =
13 N FREF , 2 12
Where N is the multiplying factor of the PLL, and FREF the frequency of the reference clock. With N=18 and FREF=32.768 kHz, the expression gives f=1872 Hz. The power amplifier delivers a square wave current whose amplitude is programmable (see the configuration register section below). The figure below shows the shapes of the signals when, as an example, ISINK=110 mA. The transmitter processes the input data in real time without any additional sampling or filtering, which means that the data rate does not depend on the XE1209.
DDS output
PA sink current
110 mA ISINK 0 mA
(c) Semtech 2005
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6
XE1209
Ultra Low Power CMOS Transceiver
6.2 RECEIVE MODE The data available at receiver output are valid between 20% and 60% of the data period (1/DR) after the rising edge of the clock (DCLK) as shown in figure below. The received data rate must be 1820 bit/s +/- 2 % for proper bit synchronizer operation. In addition, the bit synchronizer needs to see at least one transition (from "1" to "0" or from "0" to "1") every 8 bits present at its input.
60% of 1/DR 20% of 1/DR 1/DR
DATA
DCLK
At the beginning of the reception, the bit synchronizer needs to receive a preamble which is a sequence of 16 "0" and "1" bit sent alternatively.
6.3 CARRIER DETECTION MODE The Carrier Detection mode is active when the TR bit in the configuration register is 0 and the RE input pin is 1. The signal present at RF inputs is amplified and compared to a voltage threshold. When a RF signal is present at the input, the comparator output is a square wave at a frequency equal to the frequency of the RF signal. This signal is fed into a 3-bit counter, whose output is directly available on the DATA pin. In this case, the DATA signal is a square wave whose frequency is 1/8 of the RF carrier frequency.
~ 4.8 ms
RE (TR=0)
RFIN (shown as square wave) DATA
The carrier detector set-up time (after TR bit set to 0 and RE input set to 1) is 4.85ms when the carrier frequency is 36.86 kHz. In the applications where the carrier detector is turned on for a relative long period (tens to hundreds of ms), it is recommended to reset the block with a short transition to stand-by mode (RE=0). The timing diagram of the carrier detection is shown below when a RF signal is present at input and the function is programmed.
(c) Semtech 2005
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XE1209
Ultra Low Power CMOS Transceiver 7 PROGRAMMING / DATA INTERFACE
Programming the XE1209 is performed through the 3-wire interface SC, SD, DE, as shown below. The enable signal DE goes low at the same time as the 8th falling edge of SC (that is, with a maximum delay between each other of 100 ns). From the rising edge of DE, the XE1209 will sample the data present on SD at the first 8 falling edges of SC, whatever is the following sequence on SC and SD. For a proper data transfer, the data on SD must be stable for 5 microseconds before and after each falling edge on SC. The values on SC, SD and DE (as well as RE) must be kept constant (either at VDD or VSS) during all the time where the XE1209 has to be effective in modes M2, M3 and M4.
SC SD DE
R 0 R 1 R 2 R 3 R 4 R 5 R 6 R 7
7.1 CONFIGURATION REGISTER The content of the configuration register received data during the 3-wire communication.
is
described
below.
The
bit
R0
is
the
first
R7
OSC
R6
TES T
R5
SENS
R4
P2
R3
P1
R2
P0
R1
TR
R0
FC
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XE1209
Ultra Low Power CMOS Transceiver
Name FC TR P0 P1 P2 SENS TEST OSC
Description 0 Carrier frequency Transmission flag Power level Power level Power level Carrier detector threshold Test flag Oscillator flag
Convention 36.86 kHz Mode M1 (RE=0) Mode M2 (RE=1) LSB (see Table 3) MSB 200 V Normal mode External oscillator
Table 2 Configuration register
1 45.05 kHz Mode M3 (RE=0) Mode M4 (RE=1)
500 V Test mode Internal oscillator
Correspondence between the word {P2 P1 P0} and the current sinked by the power amplifier is shown below. The words 110 and 111 are reserved for test purposes. P2 P1 P0 0 0 0 0 1 1 0 0 1 1 0 0 0 1 0 1 0 1 Power amplifier current 1.8 mA 3.5 mA 7.5 mA 30 mA 60 mA 110 mA
Table 3 Sink current levels
TR (register) 0 0 1 1
RE (input pin) 0 1 0 1
Mode M1 (standby) M2 (carrier detector) M3 (transmitter) M4 (receiver)
Table 4 Mode selection
Upon start-up, a reset of the XE1209 is required to set the configuration register in a proper default mode. This is done by sending the binary word 'b00000000 to the circuit using the 3-wire bus, while setting RE to "0".
(c) Semtech 2005
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XE1209
Ultra Low Power CMOS Transceiver
(c) Semtech 2005 All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Semtech. assumes no responsibility or liability whatsoever for any failure or unexpected operation resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified range. SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER'S OWN RISK. Should a customer purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages and attorney fees which could arise.
Contact Information
Semtech Corporation Wireless and Sensing Products Division 200 Flynn Road, Camarillo, CA 93012 Phone (805) 498-2111 Fax : (805) 498-3804
(c) Semtech 2005
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